Weirong Jiang
City:
Los Angeles
State/Province:
CA
Country:
United States
Current Affiliation:
University of Southern California
Current Position:
PhD Candidate
Career Highlights:
Best Paper Awards in PDCS '09, IEEE IPDPS '08, ACM CF '08, IEEE ICN '07
Field of Research:
ENGINEERING - Electrical and Electronic Engineering - Circuits and Systems
Professional Memberships:
Student Member of IEEE, ACM, SCS.
Research Interests:
Network Processing;
Low-Power Architectures;
Reconfigurable Computing; FPGA;
Parallel & Distributed Systems;
Wireless Networking;
Security & Trust;
Simulation & Emulation
Publication History:
[1] W. Jiang and V. K. Prasanna, Sequence-Preserving Parallel IP Lookup using Multiple SRAM-based Pipelines, Journal of Parallel and Distributed Computing (JPDC), Volume 69, Issue 9, Sep. 2009, pp. 778-789.
[2] W. Jiang and V. K. Prasanna, Architecture-Aware Data Structure Optimization for Power-Efficient IP Lookup, to appear in Proc. 11th IEEE International Conference on High Performance Switching and Routing (HPSR '10), Jun. 2010.
[3] W. Jiang, Y. E. Yang and V. K. Prasanna, Scalable Multi-Pipeline Architecture for High Performance Multi-Pattern String Matching, to appear in Proc. 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS '10), Apr. 2010.
[4] W. Jiang and V. K. Prasanna, Towards Practical Architectures for SRAM-based Pipelined Lookup Engines, in Proc. INFOCOM '10 Work-in-Progress, Mar. 2010.
[5] Jeffrey M. Wagner, W. Jiang and V. K. Prasanna, A Scalable Pipeline Architecture for Line Rate Packet Classification on FPGAs, in Proc. 21st IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS '09), Nov. 2009. (Best Paper Award in Network Performance Area)
[6] W. Jiang and V. K. Prasanna, Reducing Dynamic Power Dissipation in Pipelined Forwarding Engines, in Proc. IEEE International Conference on Computer Design (ICCD '09), Oct. 2009.
[7] W. Jiang and V. K. Prasanna, Field-Split Parallel Architecture for High Performance Multi-Match Packet Classification Using FPGAs, in Proc. 21st ACM Symposium on Parallelism in Algorithms and Architectures (SPAA '09), Aug. 2009.
[8] W. Jiang and V. K. Prasanna, Large-Scale Wire-Speed Packet Classification on FPGAs, in Proc. 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '09), Feb. 2009, pp. 219-228.
[9] Y. E. Yang, W. Jiang and V. K. Prasanna, Compact Architecture for High-Throughput Regular Expression Matching on FPGA, in Proc. 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS '08), Nov. 2008.
[10] H. Le, W. Jiang and V. K. Prasanna, Scalable High-Throughput SRAM-based Architecture for IP Lookup Using FPGA, in Proc. 18th IEEE International Conference on Field Programmable Logic and Applications (FPL '08), Sep. 2008.
[11] W. Jiang and V. K. Prasanna, Multi-Terabit IP Lookup Using Parallel Bidirectional Pipelines, in Proc. 5th ACM International Conference on Computing Frontiers (CF '08), May 2008. (Best Paper Award)
[12] W. Jiang, Q. Wang and V. K. Prasanna, Beyond TCAMs: An SRAM-based Multi-Pipeline Architecture for Terabit IP Lookup, in Proc. 27th IEEE Conference on Computer Communications (INFOCOM '08), Apr. 2008, pp. 1786-1794.
[13] W. Jiang and V. K. Prasanna, Parallel IP Lookup Using Multiple SRAM-based Pipelines, in Proc. 22nd IEEE International Parallel and Distributed Processing Symposium (IPDPS '08), Apr. 2008. (Best Paper Award in Architecture Area)
[14] H. Le, W. Jiang and V. K. Prasanna, A SRAM-based Architecture for Trie-based IP Lookup Using FPGA, in Proc. 16th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '08), Apr. 2008.
[15] W. Jiang and V. K. Prasanna, A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup, in Proc. 15th IEEE Symposium on High-Performance Interconnects (HotI '07), Aug. 2007, pp. 83-90.
[16] Z. Zhang, W. Jiang and Y. Xue, A Trust Model Based Cooperation Enforcement Mechanism in Mesh Networks, in Proc. 6th IEEE International Conference on Networking (ICN '07), Apr. 2007. (Best Paper Award)
[17] W. Jiang, Z. Zhang and X. Zhong, High Throughput Routing in Large-Scale Multi-Radio Mesh Networks, in Proc. IEEE Wireless Communication & Networking Conference (WCNC '07), Mar. 2007.
[18] R. Hu, R. Yuan and W. Jiang, N-gram based Spam Filtering for Chinese Language Emails, in Proc. 4th International Conference on Applied Cryptography and Network Security (ACNS '06), Jun. 2006.
[19] W. Jiang and C. Zhang, A Portable Real-Time Emulator for Testing Multi-Radio MANETs, in Proc. 14th IEEE Workshop on Parallel and Distributed Real-Time Systems (WPDRTS '06) at IPDPS '06, Apr. 2006.
[20] W. Jiang, Data Structure Optimization of AS PATH in BGP, in Proc. 3rd International Conference on Computer Networks and Mobile Computing (ICCNMC '05), Springer LNCS 3619: 781-788, Aug. 2005.
[2] W. Jiang and V. K. Prasanna, Architecture-Aware Data Structure Optimization for Power-Efficient IP Lookup, to appear in Proc. 11th IEEE International Conference on High Performance Switching and Routing (HPSR '10), Jun. 2010.
[3] W. Jiang, Y. E. Yang and V. K. Prasanna, Scalable Multi-Pipeline Architecture for High Performance Multi-Pattern String Matching, to appear in Proc. 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS '10), Apr. 2010.
[4] W. Jiang and V. K. Prasanna, Towards Practical Architectures for SRAM-based Pipelined Lookup Engines, in Proc. INFOCOM '10 Work-in-Progress, Mar. 2010.
[5] Jeffrey M. Wagner, W. Jiang and V. K. Prasanna, A Scalable Pipeline Architecture for Line Rate Packet Classification on FPGAs, in Proc. 21st IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS '09), Nov. 2009. (Best Paper Award in Network Performance Area)
[6] W. Jiang and V. K. Prasanna, Reducing Dynamic Power Dissipation in Pipelined Forwarding Engines, in Proc. IEEE International Conference on Computer Design (ICCD '09), Oct. 2009.
[7] W. Jiang and V. K. Prasanna, Field-Split Parallel Architecture for High Performance Multi-Match Packet Classification Using FPGAs, in Proc. 21st ACM Symposium on Parallelism in Algorithms and Architectures (SPAA '09), Aug. 2009.
[8] W. Jiang and V. K. Prasanna, Large-Scale Wire-Speed Packet Classification on FPGAs, in Proc. 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '09), Feb. 2009, pp. 219-228.
[9] Y. E. Yang, W. Jiang and V. K. Prasanna, Compact Architecture for High-Throughput Regular Expression Matching on FPGA, in Proc. 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS '08), Nov. 2008.
[10] H. Le, W. Jiang and V. K. Prasanna, Scalable High-Throughput SRAM-based Architecture for IP Lookup Using FPGA, in Proc. 18th IEEE International Conference on Field Programmable Logic and Applications (FPL '08), Sep. 2008.
[11] W. Jiang and V. K. Prasanna, Multi-Terabit IP Lookup Using Parallel Bidirectional Pipelines, in Proc. 5th ACM International Conference on Computing Frontiers (CF '08), May 2008. (Best Paper Award)
[12] W. Jiang, Q. Wang and V. K. Prasanna, Beyond TCAMs: An SRAM-based Multi-Pipeline Architecture for Terabit IP Lookup, in Proc. 27th IEEE Conference on Computer Communications (INFOCOM '08), Apr. 2008, pp. 1786-1794.
[13] W. Jiang and V. K. Prasanna, Parallel IP Lookup Using Multiple SRAM-based Pipelines, in Proc. 22nd IEEE International Parallel and Distributed Processing Symposium (IPDPS '08), Apr. 2008. (Best Paper Award in Architecture Area)
[14] H. Le, W. Jiang and V. K. Prasanna, A SRAM-based Architecture for Trie-based IP Lookup Using FPGA, in Proc. 16th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '08), Apr. 2008.
[15] W. Jiang and V. K. Prasanna, A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup, in Proc. 15th IEEE Symposium on High-Performance Interconnects (HotI '07), Aug. 2007, pp. 83-90.
[16] Z. Zhang, W. Jiang and Y. Xue, A Trust Model Based Cooperation Enforcement Mechanism in Mesh Networks, in Proc. 6th IEEE International Conference on Networking (ICN '07), Apr. 2007. (Best Paper Award)
[17] W. Jiang, Z. Zhang and X. Zhong, High Throughput Routing in Large-Scale Multi-Radio Mesh Networks, in Proc. IEEE Wireless Communication & Networking Conference (WCNC '07), Mar. 2007.
[18] R. Hu, R. Yuan and W. Jiang, N-gram based Spam Filtering for Chinese Language Emails, in Proc. 4th International Conference on Applied Cryptography and Network Security (ACNS '06), Jun. 2006.
[19] W. Jiang and C. Zhang, A Portable Real-Time Emulator for Testing Multi-Radio MANETs, in Proc. 14th IEEE Workshop on Parallel and Distributed Real-Time Systems (WPDRTS '06) at IPDPS '06, Apr. 2006.
[20] W. Jiang, Data Structure Optimization of AS PATH in BGP, in Proc. 3rd International Conference on Computer Networks and Mobile Computing (ICCNMC '05), Springer LNCS 3619: 781-788, Aug. 2005.
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